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PLIC

中文说明

Features

  • Compatible with RISCV PLIC 1.0.0 standard
  • One hart target support only
  • Up to 31 external peripheral interrupt
  • 16 interrupt prority levels support
  • Rising edge and high level trigger types configuration
  • Programmable pending counter to queue edge trigger interrupt requests
  • Independent maskable and pending bit for every interrupt source
  • Static synchronous design
  • Full synthesizable

The full datasheet is datasheet.en.md.

文档以中文为第一语言,并提供对应英文版本。