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Memory map

中文说明

The current map is fixed in asic_top.v and mirrored in config/memory.yml, hw/include/soc_pkg.sv, and sw/ecos/board.h. The homepage address cards are generated from the configuration record.

RegionBaseSizeDescription
flash0x3000_00000x0100_0000External SPI flash XIP window
psram0xc000_00000x0180_0000Main software MEM region, three 8 MiB chips
clint0x0201_00000x0001_0000Core-local interruptor
plic0x0c00_00000x0040_0000Platform-level interrupt controller
uart00x1000_00000x0000_1000Console UART placeholder
rcu0x1000_20000x0000_1000Reset and clock control unit
rtc0x1000_40000x0000_1000Real-time clock
wdg0x1000_50000x0000_1000Watchdog timer
archinfo0x1000_60000x0000_1000Architecture information registers
gpio00x1010_00000x0000_1000GPIO controller
uart10x1010_30000x0000_1000APB4 UART controller
i2c0x1010_40000x0000_1000APB4 I2C controller
pwm0x1010_60000x0000_1000PWM controller
timer00x1010_80000x0000_1000APB timer
timer10x1010_90000x0000_1000APB timer
timer20x1010_a0000x0000_1000APB timer
timer30x1010_b0000x0000_1000APB timer
qspi0x1020_00000x0000_1000APB4 QSPI controller
rng0x1030_00000x0000_1000Pseudo-random number generator
crc0x1030_10000x0000_1000CRC calculation engine

This release supports only the fixed addresses in the table. Core integrations must use them and must not customize the address space by editing configuration, software headers, or asic_top.v. Configurable addressing is deferred to a later release.

Documentation is maintained from one bilingual source tree.